AON6407 30v p-channel mosfet general description product summary v ds i d (at v gs = -10v) -85a r ds(on) (at v gs = -10v) < 4.5m w r ds(on) (at v gs = -6v) < 6.0m w 100% uis tested 100% r g tested symbol v ds drain-source voltage -30 the AON6407 combines advanced trench mosfet technology with a low resistance package to provide extremely low r ds(on) . this device is ideal for load switch and battery protection applications. v maximum units parameter absolute maximum ratings t a =25c unless otherwise noted -30 g ds top view 12 3 4 87 6 5 pin1 dfn5x6 top view bottom view v ds v gs i dm i as e as t j , t stg symbol t 10s steady-state steady-state r q jc parameter typ max t c =25c 7.3 33 t c =100c junction and storage temperature range power dissipation a p dsm c/w r q ja 14 40 v 25 a c a -55 to 150 -200 17 thermal characteristics units maximum junction-to-ambient a a gate-source voltage drain-source voltage -30 continuous drain current 101 -32 45 i dsm t a =70c avalanche current c t a =25c pulsed drain current c continuous drain current g i d -85 -67 v avalanche energy l=0.1mh c mj t c =25c t c =100c w -25.5 power dissipation b w t a =70c 83 4.7 t a =25c p d maximum junction-to-case c/w c/w maximum junction-to-ambient a d 1.1 55 1.5 rev 0: oct. 2011 www.aosmd.com page 1 of 6
AON6407 symbol min typ max units bv dss -30 v v ds =-30v, v gs =0v -1 t j =55c -5 i gss 100 na v gs(th) gate threshold voltage -1.6 -2.1 -2.6 v i d(on) -200 a 3.3 4.5 t j =125c 4.9 6.5 4.4 6 m w g fs 65 s v sd -0.69 -1 v i s -85 a c iss 3505 pf c oss 900 pf c rss 650 pf r g 4.6 9.2 w q g (10v) 75 105 nc q gs 13 nc q gd 23 nc t d(on) 14 ns t r 16 ns t 94 ns v gs =0v, v ds =0v, f=1mhz v gs =-10v, v ds =-15v, i d =-20a gate source charge gate drain charge m w diode forward voltage maximum body-diode continuous current g dynamic parameters reverse transfer capacitance v gs =0v, v ds =-15v, f=1mhz switching parameters input capacitance output capacitance total gate charge gate resistance turn-on rise time turn-off delaytime v gs =-10v, v ds =-15v, r =0.75 w , r =3 w turn-on delaytime i dss m a v ds =v gs, i d =-250 m a v ds =0v, v gs =25v zero gate voltage drain current gate-body leakage current electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions drain-source breakdown voltage on state drain current i d =-250 m a, v gs =0v v gs =-10v, v ds =-5v v gs =-10v, i d =-20a i s =-1a,v gs =0v v ds =-5v, i d =-20a v gs =-6v, i d =-20a forward transconductance r ds(on) static drain-source on-resistance t d(off) 94 ns t f 75 ns t rr 35 ns q rr 75 nc i as e as this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery charge i f =-20a, di/dt=500a/ m s turn-off delaytime i f =-20a, di/dt=500a/ m s r l =0.75 w , r gen =3 w turn-off fall time body diode reverse recovery time a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the power dissipation p dsm is based on r q ja and the maximum allowed junction temperature of 150 c. the value in any given application depends on the user's specific board design, and the maximu m temperature of 150 c may be used if the pcb allows it. b. the power dissipation p d is based on t j(max) =150 c, using junction-to-case thermal resistance, and i s more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c. repetitive rating, pulse width limited by juncti on temperature t j(max) =150 c. ratings are based on low frequency and duty cycl es to keep initial t j =25 c.maximum uis current limited by test equipment. d. the r q ja is the sum of the thermal impedance from junction t o case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedance which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =150 c. the soa curve provides a single pulse rating. g. the maximum current rating is package limited. h. these tests are performed with the device mounte d on 1 in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. rev 0: oct. 2011 www.aosmd.com page 2 of 6
AON6407 typical electrical and thermal characteristics 17 52 10 0 18 0 20 40 60 80 100 1 2 3 4 5 6 -i d (a) -v gs (volts) figure 2: transfer characteristics (note e) 1 2 3 4 5 6 7 0 5 10 15 20 25 30 r ds(on) (m w ww w ) -i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1 1.2 1.4 1.6 1.8 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on - resistance vs. junction temperature v gs =-6v i d =-20a v gs =-10v i d =-20a 25 c 125 c v ds =-5v v gs =-6v v gs =-10v 0 20 40 60 80 100 0 1 2 3 4 5 -i d (a) -v ds (volts) fig 1: on-region characteristics (note e) v gs =-3.0v -3.5v -10v -5v -6v -4v 18 40 i as e as voltage (note e) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 -i s (a) -v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c figure 4: on - resistance vs. junction temperature (note e) 0 2 4 6 8 10 12 2 4 6 8 10 r ds(on) (m w ww w ) -v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) i d =-20a 25 c 125 c rev 0: oct. 2011 www.aosmd.com page 3 of 6
AON6407 typical electrical and thermal characteristics 17 52 10 0 18 0 2 4 6 8 10 0 10 20 30 40 50 60 70 80 -v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 1000 2000 3000 4000 5000 0 5 10 15 20 25 30 capacitance (pf) -v ds (volts) figure 8: capacitance characteristics c iss 0 50 100 150 200 250 300 350 400 0.0001 0.001 0.01 0.1 1 10 power (w) pulse width (s) figure 10: single pulse power rating junction - to - case c oss c rss v ds =-15v i d =-20a t j(max) =150 c t c =25 c 10 m s 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 -i d (amps) -v ds (volts) figure 9: maximum forward biased 10 m s 10ms 1ms dc r ds(on) limited t j(max) =150 c t c =25 c 100 m s 18 40 i as e as figure 10: single pulse power rating junction - to - case (note f) 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 z q qq q jc normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse figure 9: maximum forward biased safe operating area (note f) r q jc =1.5 c/w rev 0: oct. 2011 www.aosmd.com page 4 of 6
AON6407 typical electrical and thermal characteristics 17 52 10 0 18 0 20 40 60 80 100 0 25 50 75 100 125 150 power dissipation (w) t case ( c) figure 13: power de-rating (note f) 0 20 40 60 80 100 0 25 50 75 100 125 150 current rating i d (a) t case ( c) 1 10 100 1000 10000 0.0001 0.01 1 100 10000 power (w) pulse width (s) t a =25 c 1 10 100 1000 1 10 100 1000 -i ar (a) peak avalanche current time in avalanche, t a ( m mm m s) figure 12: single pulse avalanche capability (note c) t a =25 c t a =150 c t a =100 c t a =125 c 18 40 i as e as 0.001 0.01 0.1 1 10 0.0001 0.001 0.01 0.1 1 10 100 1000 z q qq q ja normalized transient thermal resistance pulse width (s) figure 16: normalized maximum transient thermal imp edance (note h) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t case ( c) figure 14: current de-rating (note f) pulse width (s) figure 15: single pulse power rating junction-to- ambient (note h) r q ja =55 c/w rev 0: oct. 2011 www.aosmd.com page 5 of 6
AON6407 vdc ig vds dut vdc vgs vgs qg qgs qgd charge gate charge test circuit & waveform - + - + -10v id vds unclamped inductive switching (uis) test circuit & waveforms vds l 2 e = 1/2 li ar ar bv vdc dut vdd vgs vds vgs rl rg resistive switching test circuit & waveforms - + vgs vds t t t t t t 90% 10% r on d(off) f off d(on) vdd vgs vgs rg dut vdc vgs id vgs - + bv dss i ar ig vgs - + vdc dut l vgs isd diode recovery test circuit & waveforms vds - vds + di/dt rm rr vdd vdd q = - idt t rr -isd -vds f -i -i rev 0: oct. 2011 www.aosmd.com page 6 of 6
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